Indian Institute of Information Technology KottayamR05Research Domain · Secure SoCs, PQC & Fault Analysis
Hardware security research in Post-Quantum Cryptography (PQC), Physical Unclonable Functions (PUF), RISC-V functional fault modeling, and side-channel resistance at I²CS Lab, IIIT Kottayam.
As connected edge devices and mission-critical SoCs proliferate, security must be rooted directly in silicon. The Hardware Security group at I²CS Research Lab, IIIT Kottayam investigates cryptographic hardware accelerators, in-field fault detection for RISC-V processors, and trustworthy IC design.
Our researchers collaborate internationally—including with Ruhr University Bochum and TU Dresden (Germany)—and recently won both 1st Prize and 3rd Prize at the 10th International Test Conference (ITC) India Hackathon as well as acceptance at the 40th VLSI Design Conference (VLSID 2027) for observability-driven in-field fault detection in RISC-V cores.
Observability-driven RTL fault injection, functional test program generation, and interface-level monitoring to detect permanent and transient faults in RISC-V cores.
High-speed polynomial multiplication (NTT) and low-area cryptographic co-processors for resource-constrained IoT and edge SoCs.
Fault modeling, diagnosis, and resilient routing for Silicon Photonic and on-chip interconnect architectures.
Physical Unclonable Functions (PUFs), true random number generators (TRNGs), and countermeasures against power and fault-injection attacks.
Agency: AICTE- ATAL · Grant: 0.93 Lakhs
Alan Thomas Paul, Niranjan K S, Adithya Prabhu, Kevin Jose, Kala S, Nalesh S · 40th IEEE International Conference on VLSI Design and 26th International Conference on Embedded Systems (VLSID 2027), Jan 2-16, 2027, Bengaluru, India
N Harshitha, Aparna Nair M K, Kala S, Nalesh S · IEEE International Conference on Smart Electronics and Communication Systems (ISENSE), December 11-12, 2026, Kerala, India
Shravan Narayan Sunil, Joel Dan Philip, Kala S, Nalesh S · 30th International Symposium on VLSI Design and Test (VDAT-2026), Noida, August 20-22, 2026, India
Niranjan K S, Alan Thomas Paul, Prashamol Prakshan, Kala S, Nalesh S · IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2026, July 7-10, 2026, Kolkata, India
Prashamol Prakashan, Nalesh S, Kala S · Quantum Cryptography and Annealing for Securing Industrial IoT, Elsevier, pp 1-11, 2026. ISBN: 978-0-443-38349-6
Joel Dan Philip, Asif Muhammed, Nalesh S, Kala S · 29th International Symposium on VLSI Design and Test (VDAT-2025), Chandigarh, August 7-9, 2025, India (Best Paper Award)
Keerthana Menon, Goutam Mali, Nalesh S, Babita Jajodia, Kala S · IEEE 37th International Conference on Microelectronics (ICM) 2025 , December 14-17, 2025, Cairo, Egypt
Rachana George, Kala S and Nalesh S · 2nd IEEE International Conference on Trends in Engineering Systems and Technologies (ICTEST), April 3-5, 2025, Kerala, India.
