I2CS - Intelligent Integrated Circuits and Systems Research Group

Research Publications

    2024-Till Date

  1. Anoop A, Christo K Thomas, Kala S, "Generalized dual-mode index modulation based on OTFS", 2024 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT), Bangalore, July 2024.
  2. Rahul Barnwal, Kala S "Morphological galaxy classification using Convolutional Neural Networks on FPGA", IEEE SPACE Conference (Space Aerospace and defenCE Conference), Bangalore, July 22-23, 2024.
  3. Aswathy Pavithran, Santhos Kumar, S Kala, Della Thomas, "Image Segmentation Using Particle Swarm Optimization and Simulated Annealing", 2024 Third International Conference on Power, Control and Computing Technologies (ICPC2T), pp 727-32, 2024, India
  4. Noble G, Nalesh S, Kala S, Akash Kumar, "Configurable Sparse Matrix - Matrix Multiplication Accelerator on FPGA: A Systematic Design Space Exploration Approach with Quantization Effects", Alexandria Engineering Journal, Elsevier (SCI Indexed, Impact factor: 6.8), 2024
  5. Raveendran S, Kenchaiah R, Kumar S, Sahoo J, Farsana MK, Chowdary Mundlamuri R, Bansal S, Binu VS, Ramakrishnan AG, Ramakrishnan S and Kala S, "Variational mode decomposition-based EEG analysis for the classification of disorders of consciousness", Frontiers in Neuroscience, 2024, Front. Neurosci. 18:1340528. doi: 10.3389/fnins.2024.1340528 (SCI Indexed, Impact Factor; 4.3)
  6. Remya R, Kala S, "Accelerating Multi-Head Self-Attention Architecture for Transformer Models on FPGA", in Students Research Forum (SRF), 37th IEEE International Conference on VLSI Design and 22nd International Conference on Embedded Systems (VLSID 2024), Jan 6-10, 2024, Kolkata, India
  7. Abhinav K, Nalesh S, Kala S, "Approximate CNN for Edge Computing", in User Design Track (UDT), 37th IEEE International Conference on VLSI Design and 22nd International Conference on Embedded Systems (VLSID 2024), Jan 6-10, 2024, Kolkata, India

    2021-2023

  8. Noble G, Nalesh S, Kala S, "Bit-Flip Attack Detection in Sparse Matrix Computations on FPGA", in 19th IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS), Hyderabad, 19-22 November 2023, India
  9. Rahul Barnwal, Noble G, Rajesh Kedia, Nalesh S, Kala S, "Leveraging Heartbeat Classification using Convolutional Neural Networks on PolarFire SoC", in 19th IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS) Co-located with PRIMEAsia, Hyderabad, 19-22 November 2023, India
  10. Rachana George, Rosemary Kuruvithadam, Nalesh S, Kala S, "Approximate 16-bit Booth Multipliers using 4:2 Compressors", in 28th International Conference on Advanced Computing and Communications (ADCOM 2023), Dec 8-10, 2023, Kerala, India
  11. Abhinav K, Rachana George, Nalesh S, Kala S, "Approximate CNN on FPGA Using Toom-Cook Multiplier", in 9th IEEE International Symposium on Smart Electronic Systems (iSES 2023), Dec 18-20, 2023, Ahmedabad, India
  12. Kavya Raj, Ansith S, Sweety Kunjachan, Kala S, "Weed Classification on UAV Images using Deep Learning", in 2023 9th IEEE International WIE Conference on Electrical and Computer Engineering (WIECON-ECE), 25-26 November 2023, Kerala, India
  13. R Remya, Nalesh S, Kala S., "Edge AI - A Promising Technology", Nanodevices for Integrated Circuit Design, Wiley October 2023, pp 211-222, https://doi.org/10.1002/9781394186396.ch11
  14. Sweety Kunjachan, Santhos kumar A, Asish G R, Sheela K, Kala S, "Comparative Study of Convolutional Neural Networks for Leaf Classification in Ayurveda", International Conference on Green Energy, Computing and Intelligent Technology (GenCiTy), Malaysia, July 2023
  15. Vishnu N, Sweety Kunjachan, Kala S, "Understanding Cloud Structures from Satellite Images using Deep Learning", in 2023 IEEE International Conference on Computer, Electronics & Electrical Engineering and their applications (IC2E3), NIT Uttarakhand, June 2023
  16. Sreelakshmi Raveendran, Santhos Kumar, Raghavendra Kenchiah, Farsana M K, Ravindranath Choudary, Sonia Bansal, Binu V S, A G Ramakrishnan, Subasree R, and Kala S, "Scalp EEG-based Classification of Disorder of Consciousness States using Machine Learning Techniques", 2023 11th IEEE International Symposium on Electronic Systems Devices and Computing (ESDC), 4-6, May 2023
  17. M A Muneeb, Nalesh S, Kala S, " A Physically Unclonable Function Architecture with Multiple Responses on FPGA" in International Journal of Embedded Systems, 2023
  18. Vishnu Bajjuri, Nalesh S, Kala S, "A Novel Adiabatic PUF for Portable Devices", in 36th IEEE International Conference on VLSI Design and 22nd International Conference on Embedded Systems (VLSID 2023), Jan 8-12, 2023, Hyderabad, India (VLSID 2023 UDT Award - Honorable Mention Award from Academia)
  19. Noble G, Nalesh S, Kala S, "MOSCON: Modified Outer Product based Sparse Matrix-Matrix Multiplication Accelerator with Configurable Tiles", in 36th IEEE International Conference on VLSI Design and 22nd International Conference on Embedded Systems (VLSID 2023), Jan 7-12, 2023, Hyderabad, India.
  20. Vishnu Bajjuri, Nalesh S, Sree Ranjani Rajendran, Kala S, "Adiabatic Physical Unclonable Function Using Cross-Coupled Pair", in 8th IEEE International Symposium on Smart Electronic Systems (iSES 2022), Dec 19-21, India.
  21. Noble G, Nalesh S, Kala S, "Accelerators for Sparse Matrix-Matrix Multiplication: A Review", in IEEE 19th India Council International Conference (INDICON 2022), Nov 24-26, 2022, Kerala, India.
  22. Rahul Barnwal, Rishabh Srivastava, Vimathithan R, Kala S, "Advanced Driver Assistance System for Autonomous Vehicles using Deep Neural Networks", IEEE Region-10 Humanitarian Technology Conference (R10 - HTC), India, September 16-18, 2022
  23. Kala S, Nalesh S., "Security and Challenges in IoT Enabled Systems", System Assurances, Elsevier, pp 437-445, Jan 2022
  24. Mahesh M, Nalesh S, Kala S, "Bandwidth-Efficient Sparse Matrix Multiplier Architecture for Deep Neural Networks on FPGA", in 34th IEEE International System-On-Chip Conference (SOCC), Las Vegas, NV, USA, September 2021.
  25. Mahesh M, Nalesh S, Kala S, "Hardware Acceleration of SpMV Multiplier for Deep Learning", in 25th International Symposium on VLSI Design and Test (VDAT- 2021), Surat, India, September 2021.
  26. Shivakrishna G and Kala S, "Sewage Monitoring System for Smart City Using Internet of Things", in International Conference on Interdisciplinary Research in Technology and Management (IRTM), Kolkata, 26-28 Feb, 2021. (Best Paper Award)

    2018-2020

  27. Kala S, Nalesh S, "Efficient CNN Accelerator on FPGA", IETE Journal of Research, 2020
  28. Kala S., Babita R Jose, Jimson Mathew, Nalesh S., "High Performance CNN Accelerator on FPGA Using Unified Winograd-GEMM Architecture", in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 27, No. 12, pp 2816-2828, December 2019., DOI: 10.1109/TVLSI.2019.2941250
  29. Kala S., Jimson Mathew, Babita R Jose, Nalesh S.,"Radix-4 3 based Two Dimensional FFT Architecture with Efficient Data Reordering Scheme",IET Computers and Digital Techniques,2019, Vol. 13 Iss. 2, pp.78-86, DOI:10.1049/iet-cdt.2018.5075.
  30. Tumun Shaily, Kala S., "Bacterial Image Classification using Convolutional Neural Networks", 17th IEEE India Council International Conference (INDICON), December 2020.
  31. Kala S., Babita R Jose, Jimson Mathew, Nalesh S., "Efficient hardware acceleration of convolutional neural networks," 32nd IEEE International System-On-Chip Conference (SOCC) 2019, Singapore, Sept 3-6, 2019.
  32. Kala S., Jimson Mathew, Babita R Jose, Nalesh S., "UniWiG: Unified Winograd- GEMM Architecture for Accelerating CNN on FPGAs", 32nd International Conference on VLSI Design and 18th International Conference on Embedded systems (VLSID) 2019, New Delhi, Jan 5-9, 2019 (Under Top 12 papers in VLSID'19)
  33. Kala S., Babita R Jose, Jimson Mathew, Nalesh S., "Accelerating Convolutional Neural Networks on FPGA", 33rd International Conference on VLSI Design and 19th International Conference on Embedded systems (VLSID) 2020, Bengaluru, Jan 4-8, 2020 (Best Student Research Forum-Runner Up)
  34. Kala S., Debdeep Paul, Babita R Jose, Jimson Mathew, Nalesh S., "Performance Analysis of Convolutional Neural Network Models," 9th International Conference on Advances in Computing and Communications (ICACC) 2019, Kochi, Nov 6-8, 2019.
  35. Kala S., Debdeep Paul, Babita R Jose, Nalesh S., "Design space exploration of convolution algorithms to accelerate CNNs on FPGA", IEEE 8th International Symposium on Embedded computing & system Design (ISED), Kochi, Dec 13-15, 2018.
  36. Kala S., Debdeep Paul, Babita R Jose, Jimson Mathew, "Accelerating Convolutional Neural Networks on FPGA using Fast Fourier Transform", 22nd International Symposium on VLSI Design and Test (VDAT-2018), Tamil Nadu, June 28-30, 2018.
  37. Kala S., Nalesh S., Babita R Jose, Jimson Mathew, Marco Ottavi, "Two dimensional FFT architecture based on radix-4 3 algorithm with efficient output reordering", IEEE 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS), Taormina, Italy, April 9-12, 2018
  38. Kala S., Nalesh S., Babita R Jose, Jimson Mathew; "Image Reconstruction using Novel Fourier Transform", Advances in Soft Computing and Machine Learning for Image Processing, Springer 2018, pp. 699-718, https://doi.org/10.1007/978-3-319-63754-9_31
  39. Minu A. Pillai, D. D. Ebenezer and Ezhilarasi Deenadayalan (2018) "Design and optimization of piezoelectric unimorph beams with distributed excitation". The Journal of the Acoustical Society of America, 143 (5), pp.2685-2696, DOI: https://doi.org/10.1121/1.5034465.
  40. Minu A. Pillai, D. D. Ebenezer and Ezhilarasi Deenadayalan (2019) "Transfer matrix analysis of a duct with gradually varying arbitrary cross-sectional area". The Journal of the Acoustical Society of America, 146 (6), pp. 4435-4445, DOI: https://doi.org/10.1121/1.5139412.

    2013-2017

  41. Kala S., Nalesh S., S K Nandy, Ranjani Narayan; "Scalable and Energy Efficient, Dynamically Reconfigurable FFT Architecture", Journal of Low Power Electronics (JOLPE), Vol. 11, No. 3, pp. 426-435(10), September 2015.American Scientific Publishers. DOI:https://doi.org/10.1166/jolpe.2015.1390
  42. Kala S., Nalesh S., Arka Maity, S K Nandy, Ranjani Narayan; "High Throughput, Low Latency, Memory Optimized 64K Point FFT Architecture using Novel Radix- 4 Butterfly Unit" in IEEE International Symposium on Circuits And Systems (ISCAS) Beijing, China, May 2013.
  43. Kala S., Nalesh S., S K Nandy, Ranjani Narayan; "Design of a Low Power 64 Point FFT Architecture for WLAN Applications", in 25th IEEE International Conference on Microelectronics (ICM), Beirut, Lebanon, December 2013.
  44. Kala S., Nalesh S., S K Nandy, Ranjani Narayan; "Energy Efficient, Scalable and Dynamically Reconfigurable FFT Architecture for OFDM Systems", in IEEE International Symposium on Electronic Design (ISED), Karnataka, December, 2014.
  45. Minu A. Pillai and Ezhilarasi Deenadayalan (2014) "A Review of Acoustic Energy Harvesting. International Journal of Precision Engineering and Manufacturing", Vol. 15, No. 5, pp.949-965, DOI: 10.1007/s12541-014-0422-x.
  46. Minu A. Pillai and Ezhilarasi Deenadayalan (2016) "Improved acoustic energy harvester using tapered neck Helmholtz resonator and piezoelectric cantilever undergoing concurrent bending and twisting". Procedia Engineering, 144, pp. 674-681, DOI:https://doi.org/10.1016/j.proeng.2016.05.065.
  47. Minu A. Pillai, D. D. Ebenezer and Ezhilarasi Deenadayalan (2017) "Analytical model of mechanically excited piezoelectric unimorph beams". The Journal of the Acoustical Society of America, 142 (2), pp.718-727, DOI: http://dx.doi.org/10.1121/1.4996852.
  48. Minu A. Pillai, D. D. Ebenezer and Ezhilarasi Deenadayalan (2017) "Erratum: Analytical model of mechanically excited piezoelectric unimorph beams" [J. Acoust. Soc. Am. 142(2), 718-727 (2017)] The Journal of the Acoustical Society of America, 142 (4), pp. 1871-1873, DOI: https://doi.org/10.1121/1.5006060.
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